In today's rapidly advancing electronics and semiconductor manufacturing industries, there is a challenge to produce smaller devices and to increase levels of integration. This applies to the various electronic components themselves, the assembly of electronic components, the packaging and integration of semiconductor chips within the electronic devices and components, and the semiconductor chips themselves.
A semiconductor chip, or simply chip, is formed on a very small, very thin substrate, typically a semiconductor substrate, upon which a plurality of semiconductor devices and components are formed. Multiple layers of patterned interconnect layers and multiple dielectric layers are used. These features enable the isolation and coupling of the various semiconductor devices and components that combine to form an integrated circuit or other complex device, i.e. the chips used in various electronic devices and components
There is a particular challenge to utilize the fabrication processes used to manufacture the semiconductor chips themselves to produce more highly integrated chips. Semiconductor chips are extremely costly to produce and to assemble, and there is a drive to use fewer chips in any electronic device and thus to produce chips with increased functionality, i.e. higher integration levels. Higher levels of integration enable the use of fewer semiconductor chips in an electronic device, enabling the device to be formed to more compact dimensions. Alternatively, an electronic device of a given size can be produced to include increased functionality with advanced chip integration levels.
It is therefore advantageous and desirable to increase integration levels of a semiconductor chip.